在用Xilinx Kintex-7 FPGA的Aurora IP核時,發現他的例程無法生成bit文件,錯誤信息如下:
ERROR:Bitgen:342 - This design contains pins which have locations (LOC) that are
not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned.
This may cause I/O contention or incompatibility with the board power or
connectivity affecting performance, signal integrity or in extreme cases
cause damage to the device or the components to which it is connected. To
prevent this error, it is highly suggested to specify all pin locations and
I/O standards to avoid potential contention or conflicts and allow proper
bitstream creation. To demote this error to a warning and allow bitstream
creation with unspecified I/O location or standards, you may apply the
following bitgen switch: -g UnconstrainedPins:Allow
Xilinx官網對此的回復是見 AR# 41615 。大意是,新版本的ISE對7系列FPGA的管腳約束增強了限制,以防止在用戶不了解電路板電壓或管腳連接時,由于ISE對于引腳和IOSTANDARD的默認(default)選擇而造成設備的損壞。通俗點說就是,Xilinx以前給我們都是設置好一個default的引腳綁定和IOSTANDARD約束的,但是為了我們用的時候對電路板不了解,也不去改默認的約束,可能會因此燒壞電路板,所以要求我們必須手動設置好才行。
另外,7系列FPGA的默認IOSTANDARD是LVCMOS18,以前的系列是LVCMOS25。